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Description of  Signal Integrity Effects in Custom IC and ASIC Designs

"offers a tutorial guide to IC designers who want to move to thenext level of chip design by unlocking the secrets of signalintegrity."Jake Buurma, Senior Vice President, WorldwideResearch & Development, Cadence Design Systems, Inc. "In the era of System-on-Chip, when large portions of the overallsystem are integrated on one large chip, designers are facingincreasingly challenging issues. For the first time, this book istaking a closer look at the signal integrity problems faced by bothhigh-performance and cost-performance applications, digital andmixed-signal integrated circuits. System designers are givenguidance in power distribution analysis, interconnect optimization,and mixed, digital-analog circuit integration challenges.Researchers and CAD engineers can get an in-depth view of thecurrent and future requirements for full-chip CAD tools, on-chiptransmission line designs, integrated passive components, and manyother critical signal integrity issues. This book is bringingtogether a broad range of representative papers that will furtherthe understanding both in the industrial and academiccommunities." - Alina Deutsch, Research Staff Member, T.J. Watson Research Center,International Business Machines "Electrical integrity (or environment noise) is becoming theprincipal obstacle in system-on-a-chip design. Digital circuitscreate a very noisy environment in which other digital and analogcircuits must function. This environmental noise comes aboutbecause of coupling through the interconnect, power supply, andsubstrate. This book surveys the latest literature on electricalintegrity analysis and design and is, therefore, an invaluableresource for anyone designing systems-on-a-chip." - Kenneth L. Shepard, Professor, Columbia University